Virtual Event
April 14
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Wednesday, April 14 • 7:45am - 7:55am
Lightning Talk: Timesecbench: A Work in Progress Benchmark Suite to Assess Timing Leakages - Ronan Lashermes, INRIA

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Timing leakage in the microarchitecture is a pervasive threat against the confidentiality of our data. In order to design more secure devices, we must first be able to evaluate the leakage. We present timesecbench, an ongoing work to develop a security benchmark suite to assess timing leakage in microarchitectural components. We will discuss the goals, the challenges, and give a glimpse of how the benchmarks work.

avatar for Ronan Lashermes

Ronan Lashermes

Research engineer, Inria
Ronan Lashermes is a research engineer at Inria Rennes, in the LHS lab. After a Ph.D. with the CEA and the UVSQ in 2014, he worked in a startup to develop physical attack benches for devices evaluation. He later joined INRIA and the LHS lab to work on hardware security (physical attacks... Read More →

Wednesday April 14, 2021 7:45am - 7:55am PDT